EDN

How to build ultra-fast floating-point FFTs in FPGAs

Engineers targeting DSP to FPGAs have traditionally used fixed-point arithmetic, mainly because of the high cost associated with implementing floating-point arithmetic. That cost comes in the form of ...
Design-Reuse

Floating-point FFT with Minimal Hardware

There is a natural preference to use floating-point implementations in custom embedded applications because they offer a much higher dynamic range and as a byproduct bypass the design hassle of ...
EDN

Fixed- and floating-point FFT libraries optimized for C-to-FPGA tools

The folks at Impulse Accelerated Technologies have announced the availability of optimized FFT libraries for FPGAs. These libraries integrate with the Impulse C software-to-hardware compiler, allowing ...
Design-Reuse

Altera Introduces Industry's First FPGA Floating-Point FFT IP Cores

New Cores Leverage Stratix Device Family's Embedded DSP Blocks to Deliver a Cost-Effective Floating-Point FFT FPGA Solution San Jose, Calif., June 3, 2003—Altera Corporation (NASDAQ: ALTR) today ...